Computer-enabled graphical display and editing systems are used in a wide variety of different applications and industries to create, view and edit different types of visual images on computer systems or other electronic devices. One common application is electronic design automation, including such applications as layout design, in which the designs for components and spatial layout of electronic components such as integrated circuits, circuit boards, and other components are created, viewed, and edited using displayed images and graphical controls in graphical software applications implemented by computer systems. Such circuit design includes the physical layout of components of the design as well as the electrical interconnects, such as wires or traces, between components. Some embodiments of circuit layout applications provide automation in various aspects or stages of the design, including the design of conductive connections such as wire connections that connect components. As the need for automation and assistance continues to increase in the custom layout space, the use of automation for the implementation of wiring in designs is gaining acceptance.
In designs for integrated circuits or other circuits, a conductor such as metal is used to connect components of the design. Electrical current passes through the metal interconnects and this conduction causes certain effects that must be taken into account in the circuit design. One of these effects is known as “IR drop”, which is a decrease in voltage along a wire due to the resistance (or sheet resistance) of the metal of the wire, and which may affect the ability of the circuit to function. Another one of these effects is electromigration, in which the force of moving electrons can over time knock a number of atoms from their original positions, eventually causing gaps in the metal and in the connections that prevent electricity flow, or causing build up of material and short circuits to nearby wires. One way to address these effects is to increase the width of a wire and thus reduce the resistivity. In addition, vias and other layer-to-layer connections are vulnerable to wire effects and can be arranged in particular orientations and modified (e.g. increased) in number to distribute current evenly through the vias and reduce these effects. Widening wires and adjusting via configuration, however, has limitations due to the restricted physical space available for such connections.
There are tools and methods to compute these wire effects on a circuit in a design. Automation can help a designer take into account and mitigate the above-described effects of metal wires by automatically checking the proper widths for the wires in a circuit. However, a problem with previous automatic wiring effect feedback is that it is performed after the circuit has been completed in the design application. For example, wiring is often created manually by a designer, where the designer knows all the currents in the circuit and other necessary information to manually compute the widths of wires. The user draws a wire trunk in the graphical application, and then creates smaller distribution networks connected to the trunk and having widths also manually computed. Since this is tedious, a designer may often take short-cuts and over-budget, e.g., use wider wires than is necessary. A wiring automation tool is used to verify that the wiring network has sufficient dimensions to avoid undesired wire effects, where this tool can provide feedback to the user as to which wires have potential problems with IR drop and electromigration. The tool provides this feedback typically after the wiring network is completed. In more recent tools, interactive feedback can be provided related to electromigration as the user draws interconnects in the design. In any case, wires that are indicated to have such wire effect problems must be manually changed by the designer based on the feedback obtained from the wiring automation tool, such as by moving the wires and/or changing the metal used in wires to provide different properties.
In other previous implementations, greater automation has been used. Full automation in generating a circuit topology has not yet been successful in meeting the requirements of high accuracy analog circuitry and the expectations of an expert layout engineer. However, other methods have been used for sizing the features of a topology. For example, a designer can manually create and complete a circuit topology, and then a sizing engine tool can be applied to automatically generate optimal sizes and widths for each wire segment in the user-specified topology based on the current computed for each wire branch. However, the designer does not know the final widths of the wires while creating the circuit design, and therefore cannot as easily make topological decisions and trade-offs as to where to place the wiring. Thus, if IR drop, electromigration, or available area is found to be an issue not easily resolved by the sizing engine, the designer must go back and re-design portions of the circuit, leading to greater inefficiency.